This invention relates generally to logic or memory circuits for producing a redundancy and more particularly, it relates to a high-low-high circuit whose output can become low by blowing a redundant enable fuse and can become high again by blowing a redundant disable fuse for indirect redundancy wherein spare rows or columns of memory elements in a memory array are substituted in place of faulty rows or columns.
In recent years, there has arisen the need of manufacturing semiconductor memories in which a memory array of elements have a very high density. As the density of the memory array on a semiconductor chip increases, it becomes a significantly more difficult task to produce perfect semiconductor memory chips. In an effort to improve production yields and memory chip reliability, redundant memory elements or bits in the form of additional rows or columns in the memory array have been included on the semiconductor chip. The semiconductor memory may be checked when it is still in a semiconductor wafer form joined to other semiconductor memory chips to determine whether its operates properly. If a faulty area is located, extra memory circuits can then be substituted for the defective elements in this faulty area on the primary memory array of memory elements.
Heretofore, there are many known existing circuits which implement the substitution of memory elements in a memory array so as to perform the necessary repairs of the faulty memory elements. One of these prior art circuits require the use of a high number of circuit components and has a very complex arrangement with a power-up reset network. As a result, this circuit suffers from the disadvantage of high power consumption. Another prior art circuit is implemented by the use of a number of pass gates which have the inherent problems of undershoot and overshoot due to parasitic capacitances. Thus, such circuit using pass gates are susceptible to a latch-up condition.
It would therefore be desirable to provide a logic circuit for activating and deactivating redundant elements in which the logic circuit utilizes a relatively few number of components. The logic circuit of the present invention includes a high-low-high circuit which enables a redundant element by blowing a first fuse and disabling the redundant element by blowing a second fuse. This technique utilizes a dynamic latch which consumes no DC current so as to reduce power consumption.